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RISC-V is the most important new instruction set architecture (ISA) that you might hear for the first time. There is no need to worry because this article will give you answers to the following most common questions: what is RISC-V, why is it important, in what devices will we see RISC-V ISA, who will benefit and who will suffer from this new RISC-V?
Let us have a look at our first question.
The RISC-V (pronounces as RISC five) could be identified as an architecture with a complex of ISA instructions, which is with an open standard (open- source license). The ISA is how the software is encoded and is basically the language that a processor understands. Each instruction is an understandable command for the processor. What differentiates it from the rest is that a payment of a fee is not required, so it is easier and cheaper to start developing RISC-V hardware.
The RISC-V history begins in 1980 when the term RISC was first introduced. The RISC ISA is a simplified set of instructions – a lot fewer than CISC (complex instruction set computer). Each of the instructions needs to accomplish less per data memory cycle, in comparison with the CISC. From the original RISC, the popular ISAs came like DLX and ARM.
The first version, called Berkeley RISC, of the “small summer project “ has been published by the scientist Krste Asanovic and later on the 5th version of it was named RISC- V. The Krste’s team under a BSD license has published the RISC- V. This architecture with a complex of instructions was launched along with several CPV designs, which allow other companies to use them and build their own implementation. The 3rd parties can create free, open-source, closed-source the way they desire.
An important notice that should be mentioned is that if a company is using RISC- V to design a chip, it does not need to publish its source code. There is open-source and closed-source RISC-V hardware.
The RISC-V foundation that runs and manages the documentation was created with the purpose to provide a stable ecosystem around the new ISA. Thanks to the fact that the foundation moved to Switzerland in 2019, the trade war between U.S. and China is not going to be a worrying aspect.
RISC-V is a disruptive technology that brings the following benefits:
The RISC-V ISA is not really targeting the computer or mobile market right now. Today, almost everything has a chip inside – IoT devices, wearables, cars, electric appliances, machines, etc.
But, yes, RISC-V can power a system with a Linux distribution. There are two companies- SiFive and Andes Technology, which are offering computer configurations with RISC-V processors.
SiFive’s offer is the x280 core. It is designed to be used in vehicles, and data centers. What we know about it is that it will be a multi-core design. The product is not a traditional AI processor, but it can serve as “scalable solutions for AI and ML applications” thanks to the RV64GCV extension.
AndeSight’s offer is AndesSight IDE v5.0. There are both 32-bit and 64-bit cores – 32-bit A45MP and 64-bit AX45MP. It supports RVV vector extension and RISC-V DSP/SIMD. What you can expect from AndSight is support for Linux 5.4 LTS, and RTOS.
Yes, there have been quite a few ISA designs:
What you can see is that most of the processors’ architecture is not open-source, nor royalty-free. A few companies control the intellectual properties and no matter what device another company is producing – PC, tablet, mobile phone, IoT, wearables, cars, electric-domestic appliances, or anything with a chip, a fee must be paid.
This is why it is very important to look at the free and open-source ISA. It might lower the price of future tech items and keep the competition busy with innovations.
The x86 processors have been the dominant type of CPU for computers for a long time. Still, when you are searching for a new computer, cloud server, or a dedicated one you will see Intel’s or AMD’s options, and they are both using processors with x86 architecture. The x86 ISA is a product of Intel and it was first used for the 8086 microprocessor. In the more than 50 years since it was introduced, there has been a lot of development, adding of new extensions and software. For many years the x86 was the way to go, without any significantly important option on sight. But there came ARM.
The newcomer ARM is a company that creates and licenses designs for CPUs and GPUs. It dominates the mobile market and it is heading towards the PC market too. There are many Chrome OS computers, Linux computers, Windows, and even Apple devices.
Apple decided to choose ARM as the only ISA they want to use in the future, abandoning the x86 ship. This clearly shows how the market is changing.
The ARM architecture, which previous name was Advanced RISC Machines, is a Risc architecture. These intellectual properties are owned by Arm Ltd. and are similar to RISC- V. The only difference is that it is not open-source. The company is charging a license fee for their designs like A78, Mali GPU, etc. But also they allow companies to modify them and create their cores like Apple, Microsoft, Qualcomm, etc.
Currently, no matter if you are using an Android or iOS smartphone, you have an ARM chip inside.
The advantage that it has over the RISC-V is that it is already a mature platform. There is a lot of software and new extensions that make it very interesting for different industries. Just see the OSes that it can run on: Windows 10, Ubuntu, Debian, Fedora, FreeBSD, FreeRTOS, Android, Chrome OS, Tizen, Windows 10 IoT Core, etc. Arm costs license fee, so the RISC-V can compete in the different price segment, where the low cost is more important than the performance.
RISC and CISC are the two most popular ISA types. Intel and AMD are using CISC in their computer processors and RISC is used for all kinds of electronics and mobile devices.
What differentiates them is that RISC emphasizes on software, while CISC emphasizes on hardware. Moreover, RISC uses single-clock instruction as oppose to multiple-clock complex instructions on CISC. Register to register “Load” and “Store” are independent instructions vs memory to memory “Load” and “Store” are a part of instructions. Low cycles per second, large code sizes, and more RAM needed vs small code sizes, high cycles per second with less RAM needed. A small number of instructions vs a large number of instructions.
Fragmentation could be said as the main challenge in front of RISC- V. If there are many different RISC-V ISAs, that are developed by different companies, that will be a huge problem. This is why the RISC-V foundation was created to orientate the project towards the right direction of standardization.
The RISC-V is still a new architecture, which means that the platform does not have enough developers and it no longer has a software that is already available. Even though the platform is growing fast this does not mean that there is a guaranteed place on the chip market in a long term.
A great opportunity for RISC- V is in China. Due to the trade war between the USA and China, it might end up as an ARM vs RISC-V war. The USA can control all US companies, including Nvidia which is on a way to acquire ARM. If this happens, China might see RISC-V as their only choice of action.
Based on data of 2020, 23% of ASIC and FPGA projects include at least one RISC-V processor. You can expect this number to grow even further and find RISC-V processors in data centers, mobiles, automotive, consumer electronics, IoT devices, and memories.
RISC-V is growing rapidly and it will be one of the most significant techs in the near future. Where exactly it will end, it is still yet to be seen. The advantage of free ISA is great, but the fact that the processor’s design could be sold in the same way as ARM processors doesn’t make a great difference. There is a great possibility that we could see many devices of any size with RISC- V chip inside but it might happen even without your notice.
Here is another article that may be useful to you:
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